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?2001 fairchild semiconductor corporation november 2001 rev. a, november 2001 sfr9230b / sfu9230b sfr9230b / sfu9230b 200v p-channel mosfet general description these p-channel enhancement mode power field effect transistors are produced using fairchild?s proprietary, planar, dmos technology. this advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. these devices are well suited for high efficiency switching dc/dc converters. features ? -5.4a, -200v, r ds(on) = 0.6 ? @v gs = -10 v ? low gate charge ( typical 33 nc) ? low crss ( typical 45 pf) ? fast switching ? 100% avalanche tested ? improved dv/dt capability absolute maximum ratings t c = 25c unless otherwise noted thermal characteristics symbol parameter sfr9230b / sfu9230b units v dss drain-source voltage -200 v i d drain current - continuous (t c = 25c) -5.4 a - continuous (t c = 100c) -3.4 a i dm drain current - pulsed (note 1) -22 a v gss gate-source voltage 30 v e as single pulsed avalanche energy (note 2) 390 mj i ar avalanche current (note 1) -5.4 a e ar repetitive avalanche energy (note 1) 4.9 mj dv/dt peak diode recovery dv/dt (note 3) -5.5 v/ns p d power dissipation (t a = 25c) * 2.5 w power dissipation (t c = 25c) 49 w - derate above 25c 0.44 w/c t j , t stg operating and storage temperature range -55 to +150 c t l maximum lead temperature for soldering purposes, 1/8 " from case for 5 seconds 300 c symbol parameter typ max units r jc thermal resistance, junction-to-case -- 2.55 c / w r ja thermal resistance, junction-to-ambient * -- 50 c / w r ja thermal resistance, junction-to-ambient -- 110 c / w * when mounted on the minimum pad size recommended (pcb mount) i-pak sfu series d-pak sfr series gs d gs d ? ? ? ? ! ! ! ! ! ! ! ! ! ! ! ! ? ? ? ? ! ! ! ! ! ! ! ! ! ! ! ! s d g
rev. a, november 2001 sfr9230b / sfu9230b (note 4) (note 4, 5) (note 4, 5) (note 4) ?2001 fairchild semiconductor corporation electrical characteristics t c = 25c unless otherwise noted notes: 1. repetitive rating : pulse width limited by maximum junction temperature 2. l = 20mh, i as = -5.4a, v dd = -50v, r g = 25 ?, starting t j = 25c 3. i sd -6.5a, di/dt 400a/ s, v dd bv dss, starting t j = 25c 4. pulse test : pulse width 300 s, duty cycle 2% 5. essentially independent of operating temperature symbol parameter test conditions min typ max units off characteristics bv dss drain-source breakdown voltage v gs = 0 v, i d = -250 a -200 -- -- v ? bv dss / ? t j breakdown voltage temperature coefficient i d = -250 a, referenced to 25c -- -0.16 -- v/c i dss zero gate voltage drain current v ds = -200 v, v gs = 0 v -- -- -1 a v ds = -160 v, t c = 125c -- -- -10 a i gssf gate-body leakage current, forward v gs = -30 v, v ds = 0 v -- -- -100 na i gssr gate-body leakage current, reverse v gs = 30 v, v ds = 0 v -- -- 100 na on characteristics v gs(th) gate threshold voltage v ds = v gs , i d = -250 a -2.0 -- -4.0 v r ds(on) static drain-source on-resistance v gs = -10 v, i d = -2.7 a -- 0.6 0.8 ? g fs forward transconductance v ds = -40 v, i d = -2.7 a -- 5.9 -- s dynamic characteristics c iss input capacitance v ds = -25 v, v gs = 0 v, f = 1.0 mhz -- 775 1000 pf c oss output capacitance -- 135 175 pf c rss reverse transfer capacitance -- 45 60 pf switching characteristics t d(on) turn-on delay time v dd = -100 v, i d = -6.5 a, r g = 25 ? -- 10 30 ns t r turn-on rise time -- 30 70 ns t d(off) turn-off delay time -- 120 250 ns t f turn-off fall time -- 60 130 ns q g total gate charge v ds = -160 v, i d = -6.5 a, v gs = -10 v -- 33 45 nc q gs gate-source charge -- 4.5 -- nc q gd gate-drain charge -- 14.5 -- nc drain-source diode characteristics and maximum ratings i s maximum continuous drain-source diode forward current -- -- -5.4 a i sm maximum pulsed drain-source diode forward current -- -- -22 a v sd drain-source diode forward voltage v gs = 0 v, i s = -5.4 a -- -- -5.0 v t rr reverse recovery time v gs = 0 v, i s = -6.5 a, di f / dt = 100 a/ s -- 160 -- ns q rr reverse recovery charge -- 1.25 -- c
rev. a, november 2001 ?2001 fairchild semiconductor corporation sfr9230b / sfu9230b 0 8 16 24 32 40 0 2 4 6 8 10 12 v ds = -100v v ds = -40v v ds = -160v note : i d = -6.5 a -v gs , gate-source voltage [v] q g , total gate charge [nc] 10 -1 10 0 10 1 0 500 1000 1500 2000 c oss c iss = c gs + c gd (c ds = shorted) c oss = c ds + c gd c rss = c gd notes : 1. v gs = 0 v 2. f = 1 mhz c rss c iss capacitance [pf] v ds , drain-source voltage [v] 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 10 -1 10 0 10 1 150 notes : 1. v gs = 0v 2. 250 s pulse test 25 -i dr , reverse drain current [a] -v sd , source-drain voltage [v] 0 5 10 15 20 25 30 0.3 0.6 0.9 1.2 1.5 1.8 note : t j = 25 v gs = - 20v v gs = - 10v r ds(on) [ ? ], drain-source on-resistance -i d , drain current [a] 246810 10 -1 10 0 10 1 notes : 1. v ds = -40v 2. 250 s pulse test -55 150 25 -i d , drain current [a] -v gs , gate-source voltage [v] 10 -1 10 0 10 1 10 -2 10 -1 10 0 10 1 v gs top : -15.0 v -10.0 v -8.0 v -7.0 v -6.5 v -6.0 v bottom : -5.5 v notes : 1. 250 s pulse test 2. t c = 25 -i d , drain current [a] -v ds , drain-source voltage [v] typical characteristics figure 5. capacitance characteristics figure 6. gate charge characteristics figure 3. on-resistance variation vs. drain current and gate voltage figure 4. body diode forward voltage variation vs. source current and temperature figure 2. transfer characteristics figure 1. on-region characteristics
?2001 fairchild semiconductor corporation rev. a, november 2001 sfr9230b / sfu9230b 10 0 10 1 10 2 10 -1 10 0 10 1 dc 10 ms 1 ms 100 s operation in this area is limited by r ds(on) notes : 1. t c = 25 o c 2. t j = 150 o c 3. single pulse -i d , drain current [a] -v ds , drain-source voltage [v] 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 -2 10 -1 10 0 n otes : 1. z jc (t) = 2.55 /w m ax. 2. d uty f a ctor, d = t 1 /t 2 3. t jm - t c = p dm * z jc (t) sin g le p u ls e d=0.5 0.02 0.2 0.05 0.1 0.01 z jc (t), therm al r esponse t 1 , s q uare w a ve p u lse d u ration [se c] 25 50 75 100 125 150 0 1 2 3 4 5 6 -i d , drain current [a] t c , case temperature [ ] -100 -50 0 50 100 150 200 0.0 0.5 1.0 1.5 2.0 2.5 not es : 1. v gs = -10 v 2. i d = -3.3 a r ds(on) , (normalized) drain-source on-resistance t j , junction temperature [ o c] -100 -50 0 50 100 150 200 0.8 0.9 1.0 1.1 1.2 not es : 1. v gs = 0 v 2. i d = -250 a -bv dss , (normalized) drain-source breakdown voltage t j , junction temperature [ o c] typical characteristics (continued) figure 9. maximum safe operating area figure 10. maximum drain current vs. case temperature figure 7. breakdown voltage variation vs. temperature figure 8. on-resistance variation vs. temperature figure 11. transient thermal response curve t 1 p dm t 2
rev. a, november 2001 ?2001 fairchild semiconductor corporation sfr9230b / sfu9230b gate charge test circuit & waveform resistive switching test circuit & waveforms unclamped inductive switching test circuit & waveforms charge v gs -10v q g q gs q gd -3ma v gs dut v ds 300nf 50k 200nf 12v same type as dut charge v gs -10v q g q gs q gd -3ma v gs dut v ds 300nf 50k 200nf 12v same type as dut v ds v gs 10% 90% t d(on) t r t on t off t d(off) t f v dd -10v v ds r l dut r g v gs v ds v gs 10% 90% t d(on) t r t on t off t d(off) t f v dd -10v v ds r l dut r g v gs e as =li as 2 ---- 2 1 -------------------- bv dss -v dd bv dss v dd v ds bv dss t p v dd i as v ds (t) i d (t) time -10v dut r g l i d t p e as =li as 2 ---- 2 1 e as =li as 2 ---- 2 1 ---- 2 1 -------------------- bv dss -v dd bv dss v dd v ds bv dss t p v dd i as v ds (t) i d (t) time -10v dut r g l l i d i d t p
?2001 fairchild semiconductor corporation rev. a, november 2001 sfr9230b / sfu9230b peak diode recovery dv/dt test circuit & waveforms dut v ds + _ driver r g compliment of dut (n-channel) v gs ? dv/dt controlled by r g ?i sd controlled by pulse period v dd l i sd 10v v gs ( driver ) i sd ( dut ) v ds ( dut ) v dd body diode forward voltage drop v sd i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period -------------------------- dut v ds + _ driver r g compliment of dut (n-channel) v gs ? dv/dt controlled by r g ?i sd controlled by pulse period v dd l l i sd 10v v gs ( driver ) i sd ( dut ) v ds ( dut ) v dd body diode forward voltage drop v sd i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period -------------------------- d = gate pulse width gate pulse period --------------------------
rev. a, november 2001 ?2001 fairchild semiconductor corporation sfr9230b / sfu9230b package dimensions 6.60 0.20 2.30 0.10 0.50 0.10 5.34 0.30 0.70 0.20 0.60 0.20 0.80 0.20 9.50 0.30 6.10 0.20 2.70 0.20 9.50 0.30 6.10 0.20 2.70 0.20 min0.55 0.76 0.10 0.50 0.10 1.02 0.20 2.30 0.20 6.60 0.20 0.76 0.10 (5.34) (1.50) (2xr0.25) (5.04) 0.89 0.10 (0.10) (3.05) (1.00) (0.90) (0.70) 0.91 0.10 2.30typ [2.30 0.20] 2.30typ [2.30 0.20] max0.96 (4.34) (0.50) (0.50) d-pak dimensions in millimeters
?2001 fairchild semiconductor corporation rev. a, november 2001 sfr9230b / sfu9230b package dimensions (continued) i-pak 6.60 0.20 0.76 0.10 max0.96 2.30typ [2.30 0.20] 2.30typ [2.30 0.20] 0.60 0.20 0.80 0.10 1.80 0.20 9.30 0.30 16.10 0.30 6.10 0.20 0.70 0.20 5.34 0.20 0.50 0.10 0.50 0.10 2.30 0.20 (0.50) (0.50) (4.34) dimensions in millimeters
?2001 fairchild semiconductor corporation disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms datasheet identification product status definition advance information formative or in design this datasheet contains the design specifications for product development. specifications may change in any manner without notice. preliminary first production this datasheet contains preliminary data, and supplementary data will be published at a later date. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. no identification needed full production this datasheet contains final specifications. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. obsolete not in production this datasheet contains specifications on a product that has been discontinued by fairchild semiconductor. the datasheet is printed for reference information only. rev. h4 trademarks the following are registered and unregistered trademarks fairchild semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. star*power is used under license acex? bottomless? coolfet? crossvolt ? densetrench? dome? ecospark? e 2 cmos? ensigna? fact? fact quiet series? fast ? fastr? frfet? globaloptoisolator? gto? hisec? isoplanar? littlefet? microfet? micropak? microwire? optologic? optoplanar? pacman? pop? power247? powertrench ? qfet? qs? qt optoelectronics? quiet series? slient switcher ? smart start? star*power? stealth? supersot?-3 supersot?-6 supersot?-8 syncfet? trutranslation? tinylogic? uhc? ultrafet ? vcx?
product folder - fairchild p/n sfu9230b - 200v p-channel a-fet fairchild semiconductor space space space search | parametric | cross reference space product folders and datasheets application notes space space space find products home >> find products >> space space space space products groups space analog and mixed signal discrete interface logic microcontrollers non-volatile memory optoelectronics markets and applications new products product selection and parametric search cross-reference search technical information buy products technical support my fairchild company sfu9230b 200v p-channel a-fet related links request samples dotted line how to order products dotted line product change notices (pcns) dotted line support dotted line distributor and field sales representatives dotted line quality and reliability dotted line design tools contents general description | features | product status/pricing/packaging general description these p-channel enhancement mode power field effect transistors are produced using fairchild?s proprietary, planar, dmos technology. this advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. these devices are well suited for high efficiency switching dc/dc converters. back to top features l -5.4a, -200v m r ds(on) = 0.6 w @v gs = -10 v l low gate charge ( typical 33 nc) l low crss ( typical 45 pf) l fast switching l 100% avalanche tested l improved dv/dt capability back to top space datasheet download this datasheet pdf e-mail this datasheet [e- mail] this page print version product status/pricing/packaging product product status package type leads packing method sfu9230btu full production to-251(ipak) 3 rail file:///c|/pdf/sfu9230b.html (1 of 2) [27-jul-02 3:25:17 pm]
product folder - fairchild p/n sfu9230b - 200v p-channel a-fet back to top space space home | find products | technical information | buy products | support | company | contact us | site index | privacy policy ? copyright 2002 fairchild semiconductor space space file:///c|/pdf/sfu9230b.html (2 of 2) [27-jul-02 3:25:17 pm]
product folder - fairchild p/n sfr9230b - 200v p-channel b-fet / substitute of sfr9230 fairchild semiconductor space space space search | parametric | cross reference space product folders and datasheets application notes space space space find products home >> find products >> space space space space products groups space analog and mixed signal discrete interface logic microcontrollers non-volatile memory optoelectronics markets and applications new products product selection and parametric search cross-reference search technical information buy products technical support my fairchild company sfr9230b 200v p-channel b-fet / substitute of sfr9230 related links request samples dotted line how to order products dotted line product change notices (pcns) dotted line support dotted line distributor and field sales representatives dotted line quality and reliability dotted line design tools contents general description | features | product status/pricing/packaging general description these p-channel enhancement mode power field effect transistors are produced using fairchild?s proprietary, planar, dmos technology. this advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. these devices are well suited for high efficiency switching dc/dc converters. back to top features l -5.4a, -200v m r ds(on) = 0.6 w @v gs = -10 v l low gate charge ( typical 33 nc) l low crss ( typical 45 pf) l fast switching l 100% avalanche tested l improved dv/dt capability back to top space datasheet download this datasheet pdf e-mail this datasheet [e- mail] this page print version product status/pricing/packaging product product status package type leads packing method file:///c|/pdf/sfr9230b.html (1 of 2) [27-jul-02 3:25:18 pm]
product folder - fairchild p/n sfr9230b - 200v p-channel b-fet / substitute of sfr9230 sfr9230btm full production to-252(dpak) 2 tape reel sfr9230btf full production to-252(dpak) 2 tape reel back to top space space home | find products | technical information | buy products | support | company | contact us | site index | privacy policy ? copyright 2002 fairchild semiconductor space space file:///c|/pdf/sfr9230b.html (2 of 2) [27-jul-02 3:25:18 pm]

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